MIPS to Highlight RISC-V Chiplet Designs at 2026 Summit
Event summary
- MIPS, a GlobalFoundries company, will present at Chiplet Summit 2026 (Feb 17-19) in Santa Clara.
- Drew Barbier (VP Products) will discuss safety-critical AI applications using RISC-V.
- Sam Grove (Head of Software) will present on software-guided chiplet design acceleration.
- MIPS Atlas portfolio will be highlighted for workload-specific customization in edge AI.
The big picture
MIPS' participation underscores the growing importance of RISC-V in chiplet-based platforms for AI applications. The company's focus on software-first design aligns with industry trends toward more flexible, domain-specific compute solutions. As edge AI demand accelerates, the ability to optimize workload interactions with customizable platforms will be a key competitive factor.
What we're watching
- RISC-V Adoption
- How MIPS will position its RISC-V offerings against competitors in automotive and industrial AI markets.
- Software-First Design
- Whether MIPS' shift-left methodology and digital twin platform modeling will gain traction in chiplet development.
- Chiplet Customization
- The pace at which workload-specific customization becomes a competitive differentiator in edge AI applications.
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