MIPS to Showcase Software-First Blueprint for Physical AI at Chiplet Summit

SANTA CLARA, CA – February 13, 2026 – As the semiconductor industry gathers for the highly anticipated Chiplet Summit 2026 next week, MIPS, a GlobalFoundries company, is poised to take center stage, detailing a strategic vision that places software at the very beginning of the chip design process. The company’s presentations are set to highlight a transformative approach for developing the next generation of physical AI applications, combining the open-source flexibility of RISC-V architecture with the modular power of chiplets.

Key executives from MIPS will lead discussions from February 17-19 at the Santa Clara Convention Center, signaling a major push to redefine how complex, safety-critical systems for automotive, robotics, and industrial markets are built. Drew Barbier, VP of Products, will deliver a presentation on “Safety-Critical Physical AI Applications Using RISC-V,” while Sam Grove, Head of Software and Tools, will present on “Software Guided Intelligence for Accelerating Chiplet Designs.” Their participation underscores a pivotal industry trend: the move away from hardware-centric design toward a more agile, software-driven methodology.

“We look forward to attending the 2026 Chiplet Summit as it brings key players in the semiconductor ecosystem, as well as serves as the ideal venue to discuss how RISC-V processors and software are critical to the next generation of physical AI applications,” said Barbier in a statement. “Our sessions will explore software-first platform design and how chiplets enable workload-specific customization, leveraging the MIPS Atlas portfolio.”

The 'Shift-Left' Revolution in Chip Design

At the heart of MIPS’s strategy is a concept known as “software-first” design, a methodology aimed at dramatically accelerating development cycles and improving final product quality. This approach represents a fundamental “shift-left” in the design process, where software development, system modeling, and workload analysis begin long before any physical silicon is produced.

Sam Grove’s presentation is expected to provide a deep dive into this paradigm. The key enabler is the MIPS Atlas Explorer, a sophisticated software platform that allows developers to create a “digital twin” of their target hardware. This high-fidelity model of the system-on-chip (SoC) enables engineers to run real-world software workloads and gain data-driven insights into how the chip will behave. They can analyze everything from memory access patterns and ALU utilization to branch prediction efficiency, identifying bottlenecks and optimizing performance at the micro-architectural level.

“A software-first approach is the foundation of modern system design,” explained Grove. “At MIPS, we are enabling a 'shift-left' methodology through digital twin platform modeling with the MIPS Atlas Explorer, delivering data-driven insights into workload behavior and pre-silicon validation.”

This pre-silicon optimization is a game-changer. By validating hardware and software interactions in a virtual environment, companies can reduce costly and time-consuming silicon respins, shorten time-to-market, and ensure that the final hardware is perfectly tuned for its intended applications. As Grove noted, “As the demand for high-performance, domain-specific compute accelerates, the ability to analyze and optimize interactions between workloads and customizable compute platforms becomes a true competitive advantage.”

RISC-V and Chiplets: The New Power Couple for Edge AI

The software-first philosophy is being applied to a powerful combination of technologies: the open-standard RISC-V instruction set architecture (ISA) and the modular design principles of chiplets. MIPS, which pivoted from its proprietary architecture to RISC-V in 2021, is now a leading provider of high-performance RISC-V processor IP, including its eVocore P8700 and I8500 series cores.

RISC-V’s open nature allows for unprecedented customization, enabling designers to create processors tailored for specific tasks, from real-time motor control in robotics to complex sensor fusion in autonomous vehicles. When combined with a chiplet-based design, this flexibility is magnified. Instead of designing a single, monolithic SoC, developers can assemble a system using pre-validated chiplets—or “tiles”—each optimized for a specific function like AI acceleration, memory control, or I/O. This modularity not only accelerates design but also allows for greater scalability and easier upgrades.

Drew Barbier’s presentation on safety-critical AI will likely focus on how this synergy is essential for the demanding autonomous edge market. The MIPS Atlas portfolio, for instance, is structured around “Sense,” “Think,” and “Act” compute categories, allowing customers to mix and match IP to build bespoke platforms for physical AI. This is crucial for automotive and industrial applications where functional safety (ASIL-B/D) and real-time responsiveness are non-negotiable.

“Processor decisions play a key role in system design,” noted Chuck Sobey, General Chair of Chiplet Summit. “MIPS’ leadership will offer our attendees the insights they need to adopt software-first RISC-V designs across a wide array of applications.”

From Design to Foundry: GlobalFoundries' Strategic Advantage

Underpinning MIPS's technological push is the strategic backing of its parent company, GlobalFoundries. This relationship provides a crucial link between advanced IP design and large-scale manufacturing, a significant advantage in the burgeoning chiplet ecosystem. By integrating MIPS’s RISC-V expertise, GlobalFoundries can offer its customers more than just foundry services; it can provide a validated, end-to-end solution for creating custom silicon.

The company’s stated goal is to deliver “RISC-V at foundry scale.” This means leveraging GlobalFoundries' advanced manufacturing and packaging technologies to make the custom, modular chiplet vision a reality for a broad range of customers. As the industry moves towards more complex, heterogeneous integration—where multiple chiplets are combined in a single package—the close collaboration between an IP provider and a leading-edge foundry becomes a powerful market differentiator.

MIPS’s prominent role at the Chiplet Summit is therefore more than a series of technical presentations; it is a clear statement about the future of semiconductor design and manufacturing. The convergence of software-first methodologies, open-standard architectures, modular chiplets, and integrated foundry services represents a comprehensive strategy to tackle the immense complexity and performance demands of the AI era.