TeraSignal Tackles AI's Power Crisis with Intelligent Interconnects

IRVINE, CA – March 10, 2026 – As the artificial intelligence revolution accelerates, the sprawling data centers that power it are confronting a critical bottleneck: the immense power consumption and data transfer limitations of their internal hardware. At the upcoming OFC 2026 conference, intelligent interconnect specialist TeraSignal is set to demonstrate a technology that directly addresses this challenge, showcasing a solution that could redefine the economics and performance of next-generation AI infrastructure.

The company will unveil a live demonstration of its TSLink™ technology, a novel link training algorithm embedded within the widely used Common Management Interface Specification (CMIS). This innovation enables linear optical and copper interconnects to automatically configure and optimize themselves for maximum performance, potentially eliminating the need for power-hungry Digital Signal Processors (DSPs) that have long been a staple of high-speed networking.

The Power-Hungry Problem of AI's Backbone

The engine of modern AI consists of vast clusters of GPUs and specialized processors, all of which must communicate with each other at blistering speeds. This communication happens over a complex web of interconnects—the physical links that form the data center's nervous system. For years, the industry has relied on optical modules equipped with DSPs to ensure data integrity over these links. DSPs act as powerful error-correction engines, reconstructing and cleaning up signals to compensate for degradation, but this robustness comes at a steep price.

DSPs are a major source of both power consumption and latency within a data center. A single high-speed optical module can dedicate a significant portion of its power budget—sometimes up to 50%—to its DSP. When multiplied across the tens of thousands of links in a hyperscale AI cluster, this results in staggering energy usage and a massive cooling burden. Furthermore, the processing required by a DSP introduces micro-seconds of delay, or latency, which can hinder the performance of tightly-coupled AI training workloads.

In response, the industry has begun a strategic shift towards linear interconnect architectures, including Linear Pluggable Optics (LPO), Near-Packaged Optics (NPO), and Co-Packaged Optics (CPO). The core principle of this trend is to simplify or entirely remove the DSP from the optical module, promising dramatic reductions in both power consumption and latency.

The Challenge of Going 'DSP-Less'

While the benefits of a DSP-less architecture are clear, the technical hurdles are significant. Removing the powerful signal conditioning capabilities of the DSP exposes the communication link to a host of potential issues. Signal integrity becomes paramount. Without a DSP to clean up the signal, the link is far more sensitive to imperfections in the electrical channel, such as signal reflections, crosstalk between data lanes, and general attenuation. This makes establishing and maintaining a stable, low-error connection a formidable engineering challenge.

Early attempts at LPO have highlighted these difficulties, often requiring extensive, manual system-level tuning and specific pairings of host hardware and optical modules to function correctly. This lack of a simple “plug-and-play” capability has been a major barrier to widespread adoption, as data center operators require reliable, interoperable components that can be deployed at scale without bespoke engineering for every link.

TeraSignal's Intelligent Solution for a Linear Future

TeraSignal’s demonstration at OFC 2026 aims to prove that an intelligent, adaptive approach can solve the signal integrity puzzle of linear optics. Instead of relying on a power-hungry DSP, the company’s TSLink technology uses a lightweight, intelligent algorithm that allows the host ASIC and the pluggable module to communicate and collaboratively tune the link.

By embedding this training algorithm within the standard CMIS framework, TSLink enables the system to dynamically adjust equalization and other operating parameters in real-time. This process automatically optimizes each individual link for its specific channel conditions, maximizing the signal-to-noise ratio (SNR) and ensuring a robust connection. It effectively provides the benefits of link optimization without the power and latency penalty of a traditional DSP.

“Next-generation linear interconnects require precise, adaptive configuration to achieve the SNR required for reliable operation,” said Dr. Armond Hairapetian, CEO at TeraSignal. “By embedding TSLink link training into CMIS—and aligning closely with OIF standards development while preparing for IEEE ILT/APSU—we enable automatic, standards-based optimization that simplifies deployment and delivers the highest possible performance for both optical and copper links.”

This technology is the foundation of TeraSignal's Intelligent Re-Driver (IRD) products, which are built on efficient CMOS designs. These devices are engineered to provide advanced link diagnostics and performance monitoring, giving operators the visibility they need to manage complex, high-speed networks effectively.

Paving the Way with Standardization and Interoperability

Perhaps one of the most critical aspects of TeraSignal's strategy is its deep commitment to industry standards. In the world of hyperscale data centers, proprietary, locked-in solutions are a non-starter. Operators demand the flexibility to source components from multiple vendors and ensure they work together seamlessly. By building its solution on top of existing and emerging standards, TeraSignal is positioning its technology not as a niche fix, but as a foundational piece of a future, interoperable ecosystem.

The company is an active participant in the Optical Internetworking Forum (OIF) and explicitly supports the OIF's CMIS-LT (Link Training) protocol. Furthermore, TeraSignal has declared its intent to support upcoming IEEE standards, such as the proposed Inline Link Training / Automatic Path Startup (ILT/APSU). This standards-first approach is crucial for de-risking the adoption of linear optics for customers.

By providing an automated, standards-aligned method for link optimization, the company's solution promises to deliver the “plug-and-play” experience that has been missing from early linear optic deployments. This could significantly accelerate the industry’s transition away from DSP-based modules, unlocking widespread power savings and performance gains. The live demonstration at OFC 2026 will therefore be closely watched by network architects and data center operators eager to find viable solutions for scaling the infrastructure that will power the next generation of artificial intelligence.