Synopsys and TSMC Deepen AI Chip Design Collaboration with Agentic AI and Advanced Packaging
Event summary
- Synopsys and TSMC announced new collaborations on September 23, 2026, to accelerate AI and HPC systems development.
- Certified EDA flows on TSMC's A14 process enable faster design convergence for next-gen AI applications.
- Agentic AI workflows automate complex analog, digital, and multi-die design tasks, boosting productivity.
- Expanded 2nm IP portfolio includes PCIe 7.0 and HBM4 for high-bandwidth AI and data center applications.
- Co-packaged optics (CPO) design enablement on TSMC COUPE™ technology supports advanced optical interconnects.
The big picture
The collaboration between Synopsys and TSMC addresses the growing complexity of AI and HPC systems design, providing certified EDA flows, agentic AI workflows, and advanced packaging solutions. This partnership is critical as the semiconductor industry pushes the boundaries of performance, integration, and energy efficiency to meet the demands of next-generation AI applications. The expanded IP portfolio and design enablement for TSMC's latest process technologies position the companies to support the rapid development of AI, data center, and edge computing systems.
What we're watching
- AI Workflow Adoption
- How quickly Synopsys and TSMC's agentic AI workflows will be adopted by semiconductor designers.
- Advanced Node Transition
- The pace at which customers will transition to TSMC's A14 and other advanced process nodes.
- Multi-Die Innovation
- Whether the expanded IP portfolio and multi-die design capabilities will drive differentiation in AI and HPC systems.
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