QuickLogic Secures Contract for eFPGA IP on Intel's 18A Process
Event summary
- QuickLogic has secured a mid-6-figure contract to implement architectural enhancements for its eFPGA Hard IP.
- The contract involves integration with a customer's ASIC based on Intel's 18A fabrication technology.
- The enhancements focus on improving power consumption, performance, and silicon area utilization (PPA).
- These improvements, initially developed in 2025, are extensible to other advanced fabrication nodes.
- QuickLogic's VP of IP Sales, Andy Jaros, highlighted the company's ability to address high-density eFPGA core requirements.
The big picture
This contract signals QuickLogic's continued focus on high-density eFPGA solutions and its strategic alignment with Intel's advanced fabrication roadmap. The mid-6-figure deal size, while not transformative, validates QuickLogic’s IP and positions it to capitalize on the growing demand for flexible, customizable silicon architectures within ASICs and SoCs. The extensibility of these enhancements across fabrication nodes suggests a potential for recurring revenue and broader market penetration.
What we're watching
- Fabrication Adoption
- The success of QuickLogic’s IP on Intel’s 18A process will be a key indicator of the broader adoption rate for this fabrication node among ASIC and SoC developers.
- Competitive Landscape
- Whether QuickLogic can maintain its competitive advantage in eFPGA Hard IP, particularly against larger players with broader fabrication partnerships, remains to be seen.
- Cost Sensitivity
- The stated ability to address cost-sensitive applications will be tested as broader economic conditions impact demand for custom silicon solutions.
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