Panmnesia Set to Mass-Produce Industry-First PCIe 6.4-CXL 3.2 Fusion Switch — Panmnesia, Inc.

Event summary

Panmnesia will mass-produce its PCIe 6.4-CXL 3.2 fusion switch chip in the second half of 2026.
The chip is the world's only ASIC switch with full CXL 3.2 compliance and Port-Based Routing (PBR).
Panmnesia secured $60 million in Series A funding in 2024, achieving a valuation of approximately $250 million.

The big picture

Panmnesia's mass production of the PCIe 6.4-CXL 3.2 fusion switch addresses growing demand for efficient AI infrastructure. The chip's unique support for Port-Based Routing and full CXL 3.2 compliance positions it as a critical component in composable architecture deployments, potentially reducing CAPEX and OPEX for large-scale AI workloads. This development comes amid increasing competition in the semiconductor space, where companies are racing to optimize data center performance.

What we're watching

Adoption Pace: How quickly early access partners integrate the switch into AI data centers and HPC environments.
Competitive Response: Whether established players like Intel or AMD will accelerate their own CXL 3.2-compliant solutions.
Market Differentiation: The extent to which Panmnesia's proprietary ultra-low-latency controller becomes a key selling point.