Panmnesia and Openchip Partner to Advance AI Infrastructure with RISC-V Accelerators
Event summary
- Panmnesia and Openchip signed a Memorandum of Understanding (MOU) at MWC26 in Barcelona on March 5, 2026.
- The partnership focuses on technical collaboration to enhance AI/HPC infrastructure performance and scalability.
- Companies will explore combining RISC-V accelerators with advanced link technologies to address data movement bottlenecks.
- Panmnesia recently unveiled its CXL 3.2 / PCIe 6.4 switch product, recognized with CES Innovation Awards in 2024 and 2025.
The big picture
This partnership underscores the growing importance of open-standard, high-performance silicon in AI infrastructure. As large-scale AI models proliferate, efficient data movement and resource utilization are becoming key competitive factors. The collaboration between Panmnesia and Openchip aims to strengthen digital sovereignty by advancing scalable and efficient AI infrastructure solutions.
What we're watching
- Technical Integration
- How the combination of RISC-V accelerators with Panmnesia's link technologies will address AI infrastructure bottlenecks.
- Market Adoption
- Whether this partnership can accelerate the adoption of open-standard, high-performance silicon in global data centers.
- Competitive Positioning
- The pace at which Panmnesia and Openchip can differentiate themselves from proprietary AI infrastructure solutions.
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