Marvell Unveils 260-Lane CXL Switch to Break AI Memory Bottlenecks — Marvell Technology, Inc.

Event summary

Marvell launched the Structera S 30260, a 260-lane CXL switch enabling rack-level memory pooling for AI workloads.
The switch integrates with Marvell’s existing CXL portfolio, including near-memory accelerators and memory-expansion controllers.
Sampling begins in Q3 2026, with the CXL 2.0 switch already in production.
The solution addresses AI memory constraints by allowing dynamic memory allocation across CPUs, GPUs, and accelerators.

The big picture

Marvell’s new CXL switch targets a critical bottleneck in AI data centers: memory capacity. As large language models and key-value caches demand more memory, traditional approaches are proving inefficient. The solution leverages Marvell’s acquisition of XConn Technologies to enable dynamic memory pooling, potentially reshaping how AI clusters scale. The move underscores the growing importance of CXL 3.0-compliant technologies in next-generation data center architectures.

What we're watching

Adoption Pace: How quickly hyperscalers and data center operators will integrate the CXL switch into their AI infrastructure.
Competitive Response: Whether competitors will accelerate their own CXL or memory-pooling solutions to counter Marvell’s offering.
Market Impact: The extent to which this solution alleviates DRAM supply constraints and reduces total cost of ownership for AI workloads.