Marvell Demonstrates PCIe 8.0 SerDes at 256 GT/s Ahead of 2028 Specification Finalization
Event summary
- Marvell will showcase PCIe 8.0 SerDes technology at DesignCon 2026, running at 256 gigatransfers-per-second (GT/s).
- The demonstration uses TE Connectivity's AdrenaLINE Catapult connector, targeting hyperscalers and cloud data center operators.
- PCIe 8.0 specification is expected to double PCIe 7.0 bandwidth, reaching up to 1 TB/s bidirectional bandwidth by 2028.
- Marvell's Alaska P PCIe 6.0 retimer and SerDes technology aim to support next-generation AI and data center infrastructure.
The big picture
Marvell's early demonstration of PCIe 8.0 technology underscores the accelerating demand for higher bandwidth in AI-driven data centers. As hyperscalers prepare for the 2028 specification, the race to optimize infrastructure for next-generation workloads intensifies. This move positions Marvell at the forefront of connectivity solutions for data-intensive applications, potentially reshaping the semiconductor landscape.
What we're watching
- Adoption Timing
- How quickly hyperscalers will integrate PCIe 8.0 into their infrastructure ahead of the 2028 specification finalization.
- Competitive Positioning
- Whether Marvell can maintain leadership in PCIe technology as competitors develop their own solutions.
- Market Impact
- The pace at which PCIe 8.0 adoption will drive demand for higher-bandwidth data center interconnects.
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