d-Matrix Integrates XPUs with NVIDIA NVLink Fusion for Ultra-Low Latency AI Inference
Event summary
- d-Matrix and NVIDIA announced a multi-year collaboration to integrate d-Matrix's next-gen inference XPUs into NVIDIA's MGX rackscale architecture with NVLink Fusion.
- The collaboration aims to enable AI labs, hyperscalers, and neoclouds to deploy ultra-low latency premium-level token services.
- d-Matrix Raptor XPUs, featuring 3D DRAM stacking technology, are designed for integration with NVIDIA NVLink Fusion and the NVIDIA MGX rack-scale ecosystem.
- Initial availability of d-Matrix Raptor XPUs integrated into the NVIDIA MGX rack is expected in Q4 2027.
The big picture
This collaboration positions d-Matrix to capitalize on the rising demand for mixed-architecture systems in the AI inference market. By integrating its XPUs with NVIDIA's widely deployed AI factory ecosystem, d-Matrix aims to offer a scalable solution for latency-sensitive applications, addressing the needs of AI service providers seeking to optimize inference economics. The strategic partnership underscores the industry's shift towards heterogeneous disaggregation, where different compute platforms are used to optimize various phases of AI workloads.
What we're watching
- Integration Success
- How seamlessly d-Matrix Raptor XPUs will integrate with NVIDIA's MGX rackscale infrastructure and the pace at which adoption will occur among AI service providers.
- Market Differentiation
- Whether d-Matrix's memory-centric architecture and 3D DRAM stacking technology will provide a competitive edge in the premium token economy.
- Execution Risk
- The potential challenges in scaling the production and deployment of d-Matrix Raptor XPUs to meet the growing demand for ultra-low latency AI inference.
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