Cadence and TSMC Deepen Collaboration on AI, HPC Chip Design Tools…

Event summary

Cadence achieved tool certification for TSMC’s advanced A14 process, enabling AI and HPC chip design flows.
Cadence demonstrated an industry-leading UALink solution in TSMC N3P and introduced new silicon-proven IP for N3P and N2P technologies.
The partnership supports TSMC 3DFabric® for wafer-scale systems with hundreds of chiplets.
Cadence’s digital, signoff, and custom/analog flows are now certified for TSMC A16™ and A14 process technologies.
Global Unichip Corp. (GUC) leverages Cadence solutions to deliver advanced custom silicon for AI accelerators and hyperscale systems on TSMC's leading-edge process technologies.

The big picture

The collaboration between Cadence and TSMC underscores the growing demand for advanced semiconductor design tools tailored for AI and HPC applications. As the industry shifts towards more complex chiplet-based architectures, the certification of Cadence’s tools for TSMC’s leading-edge processes positions both companies to capture significant market share in the high-performance computing and AI chip design sectors.

What we're watching

Tool Certification Impact: How the certification of Cadence’s tools for TSMC’s advanced processes will accelerate time-to-market for AI and HPC designs.
Chiplet Integration: The pace at which Cadence and TSMC can scale 3DFabric® support for wafer-scale systems with hundreds of chiplets.
Market Adoption: Whether the expanded partnership will drive broader adoption of Cadence’s solutions among AI and HPC chip designers.