Cadence and Samsung Foundry Expand 2nm and 3D-IC Collaboration for AI Infrastructure

Event summary

  • Cadence and Samsung Foundry announced a multi-year agreement to develop a full portfolio of Memory and Interface IP and expand certification of Cadence’s agentic AI design flows for Samsung Foundry’s second-generation 2nm process technology.
  • The collaboration includes NVIDIA NVLink-C2C-enabled interconnect and CUDA-X GPU-accelerated libraries for high-speed SerDes, PCIe, UCIe, and leading memory interfaces on second-generation 2nm.
  • Cadence’s Innovus Implementation System, Virtuoso Studio, Integrity 3D-IC Platform, Voltus IC Power Integrity Solution, and Quantus Extraction Solution are certified for Samsung Foundry’s second-generation 2nm process.
  • Ambarella is leveraging the collaboration for its next-generation 2nm edge AI platform, focusing on high-performance, ultra-low-power AI perception and physical AI SoCs.

The big picture

The collaboration between Cadence and Samsung Foundry comes at a time when AI infrastructure and physical AI applications are driving the need for more advanced semiconductor technologies. This partnership aims to provide a signoff-ready platform for next-generation AI infrastructure and physical AI designs, addressing the increasing complexity and demand for higher performance and lower power consumption in data centers, edge devices, and intelligent systems. The involvement of NVIDIA and Ambarella underscores the strategic importance of this collaboration in the broader AI hardware ecosystem.

What we're watching

AI Infrastructure Demand
How the surging demand for AI infrastructure and physical AI will impact the adoption of advanced process nodes like Samsung Foundry’s second-generation 2nm.
3D-IC Integration
Whether the expanded collaboration will accelerate the integration of 3D-IC technologies in next-generation AI and HPC systems.
Ecosystem Partnerships
The pace at which other ecosystem partners will leverage Cadence and Samsung Foundry’s platform for advanced AI and HPC designs.

Related topics

Partnership Semiconductors