Arteris Expands Multi-Die Portfolio to Accelerate AI Chiplet Adoption
Event summary
- Arteris launched FlexGen Multi-Die, extending NoC connectivity across chip boundaries for non-coherent AI and HPC architectures.
- The new product reduces PHY area, power, and I/O requirements by up to 50% over single UCIe PHY implementations.
- Arteris' expanded multi-die portfolio includes solutions for both coherent and non-coherent architectures, integration automation, and hardware security assurance.
- The technology is already being used by customers like AMD and Socionext for next-generation compute products.
- Arteris is collaborating with ecosystem partners to establish interoperability standards for multi-die designs.
The big picture
The semiconductor industry is undergoing a fundamental shift from monolithic system-on-chip (SoC) designs to multi-die chiplet architectures, driven by the demands of AI computing. Arteris' expansion of its multi-die portfolio positions the company as a key enabler of this transition, providing solutions that preserve data movement intelligence across chip boundaries. This strategic move comes as major players like AMD and Socionext increasingly adopt chiplet-based designs to balance performance, scalability, and development efficiency in AI and high-performance computing applications.
What we're watching
- Ecosystem Interoperability
- How Arteris' collaborations will affect the standardization of multi-die architectures across the semiconductor industry.
- Adoption Pace
- The rate at which major semiconductor companies transition from monolithic SoCs to chiplet-based designs using Arteris' solutions.
- Technical Challenges
- Whether Arteris can maintain performance and efficiency across increasingly complex multi-die systems.
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