Arteris Partners with IC-Link by imec to Streamline AI and HPC Chip Development
Event summary
- Arteris collaborates with IC-Link by imec to integrate its NoC IP into next-gen AI and HPC chiplet/ASIC development.
- The partnership aims to reduce integration complexity, lower development risk, and accelerate custom silicon delivery.
- K. Charles Janac (Arteris CEO) highlights the shift toward reusable architectures in semiconductor design.
- Ozgur Gursoy (IC-Link Director of ASICs) notes that Arteris’ NoC IP reduces costly rework in advanced node designs.
The big picture
As AI and HPC systems grow in complexity, engineering teams are prioritizing reusable architectures over custom-built infrastructure. This collaboration reflects a broader industry trend toward modular design solutions that improve productivity and lower risk. The partnership positions Arteris to capture more share in the high-growth AI semiconductor market.
What we're watching
- Adoption Pace
- How quickly IC-Link’s reference design gains traction among AI and HPC developers.
- Competitive Response
- Whether rivals like Synopsys or Cadence adjust their NoC IP strategies in response.
- Design Efficiency
- The extent to which reusable architectures reduce development timelines and costs.
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