XCENA Taps Hyperscale Dealmaker Steve Fingerhut for AI Memory Push

SAN JOSE, CA – October 13, 2026 – The artificial intelligence infrastructure market has spent the last several years obsessing over compute power, but the true battleground for lasting competitive advantage has quietly shifted to data movement. As hyperscalers and enterprise cloud providers construct increasingly massive AI clusters, they are slamming into the "memory wall"—a physical and architectural bottleneck where processors sit idle waiting for data to traverse the system.

Addressing this inefficiency is no longer just an engineering challenge; it is a fundamental economic imperative for the future of global commerce. In a move that signals its transition from a research-driven silicon startup to a commercial contender, XCENA, a fabless memory-centric AI computing company, today announced the appointment of Steve Fingerhut as Chief Business Officer.

Timed to coincide with the company’s showcase at the Open Compute Project (OCP) Global Summit in San Jose, the leadership addition places a proven hyperscale dealmaker at the helm of the startup's global commercial operations. Fingerhut will oversee sales, product management, strategic partnerships, and go-to-market strategy as the firm pushes its MX1 Compute Express Link (CXL) platform toward production deployment.

Breaking the AI Memory Wall with CXL

For the past decade, the dominant paradigm in data center architecture has been CPU- and GPU-centric. However, as large language models and generative AI applications scale exponentially, shuttling massive datasets back and forth between storage, memory, and processors consumes an unsustainable amount of power and introduces crippling latency.

XCENA’s approach leverages the open CXL standard to decentralize compute, bringing processing capabilities directly to where the data resides. The firm's MX1 platform—comprising specialized silicon and a full-stack software development kit (SDK)—is designed to execute computational tasks within the memory fabric itself. This near-memory computing architecture drastically reduces unnecessary data movement, thereby lowering power consumption and the total cost of ownership (TCO) for AI infrastructure operators.

“For most of my career, I have focused on the fundamental challenge of processing data efficiently at scale,” said Fingerhut in the company's announcement today. “I’ve seen that challenge move from server processors to data acceleration and now to AI infrastructure, where memory capacity and data movement, not compute alone, increasingly limit performance. XCENA addresses this at the architecture level by bringing compute to where the data lives.”

While independent benchmark results for the MX1 chip are still highly guarded, the technology has moved well beyond the conceptual phase. The firm recently detailed its architecture at industry events like Hot Chips, and its active presence at the OCP Global Summit indicates a readiness to engage with the open hardware community and tier-1 infrastructure architects.

From R&D to Hyperscale Production

The transition from producing functional silicon to securing multi-generation design wins with top-tier cloud providers is the crucible where most semiconductor startups perish. By bringing Fingerhut aboard, XCENA is acquiring a playbook for surviving this exact transition.

“XCENA has reached an important inflection point. We have demonstrated the technology and are now focused on bringing MX1 into production environments and building the business around it,” stated Jin Kim, CEO of XCENA. “Steve brings exactly the experience we need at this stage.”

Fingerhut’s track record over a 25-year career is defined by landing massive infrastructure deals. Most recently, he led Qualcomm’s data center engagement with Meta, navigating complex executive relationships and roadmap alignments. His efforts culminated in a landmark, multi-generation agreement for Qualcomm’s Dragonfly C1000 data center CPUs to power Meta’s next-generation server fleet—a deal critical to Qualcomm's stated ambition of reaching $15 billion in annual data center revenue by fiscal 2029.

Before his tenure at Qualcomm, Fingerhut served as President and Chief Business Officer at Pliops, where he built the commercial organization from the ground up and redirected its focus toward machine learning workload acceleration. Under his leadership, the firm secured a top-five hyperscaler as a customer alongside major software-as-a-service providers. His executive background also includes highly relevant stints repositioning the storage portfolio for machine learning at Marvell, and managing enterprise SSD divisions at Micron, Kioxia, and SanDisk.

South Korea’s Next Silicon Challenger

XCENA’s aggressive commercial push highlights a broader geopolitical and economic trend in the 2026 tech landscape: the rise of high-value fabless startups emerging from Asia's traditional manufacturing strongholds.

Founded by former semiconductor executives from Samsung Electronics and SK hynix, the company is headquartered in Seongnam, South Korea, while maintaining a crucial U.S. beachhead in Sunnyvale, California. This dual-hub strategy allows the startup to marry South Korea’s unmatched heritage in memory engineering with Silicon Valley’s venture capital and enterprise software ecosystems.

To date, the firm has amassed a formidable war chest of $185 million, anchored by a recent $135 million Series B financing round. This level of capitalization is a prerequisite for competing in the silicon space, where tape-out costs and software ecosystem development require massive upfront investment before a single chip is sold. The funding provides the runway necessary for the new Chief Business Officer to negotiate the long, complex sales cycles typical of hyperscale infrastructure deals.

Navigating a Maturing Ecosystem

Fingerhut’s task will not be without friction. The CXL computational memory market is rapidly maturing, and the competitive landscape is already crowded with both nimble innovators and entrenched giants.

Companies like Astera Labs have established strong footholds in CXL connectivity, offering retimers and controllers for memory expansion and pooling. Meanwhile, the very memory titans that trained XCENA's founders are aggressively pursuing their own CXL strategies. Samsung has been pushing its CXL Memory Expander, and SK hynix continues to showcase its CXL Memory Module-Bundled DRAM (CMM-B). Marvell is also a formidable presence, offering its Structera CXL family for memory expansion and optical links for cross-rack disaggregation.

However, infrastructure analysts point out that while the giants are focused heavily on memory expansion and pooling—essentially giving CPUs access to larger pools of RAM—there remains a distinct, highly lucrative opening for true computational memory. By focusing relentlessly on executing AI workloads directly within the memory subsystem, rather than just expanding capacity, XCENA hopes to offer a differentiated solution to the latency crisis.

As AI models continue their exponential growth, hyperscalers are being forced to rethink their data centers from the ground up, prioritizing energy efficiency and resource utilization over raw compute speed. In this environment, the ability to process data where it resides is no longer a fringe architectural theory; it is rapidly becoming a commercial necessity.