POET Technologies Taps Silicon Labs Vet to Lead AI Commercial Ramp

TORONTO – November 02, 2026 — For a decade, the financial narrative at POET Technologies Inc. was defined by survival and capital accumulation. Operating on the bleeding edge of photonics, the company required massive influxes of cash to fund the research and development of its proprietary optical integration platforms. Today, that era officially transitions into a new, commercially rigorous phase.

The Toronto-headquartered designer of high-speed optical engines announced the appointment of semiconductor industry veteran Giovanni M. Pacelli as its new Chief Financial Officer, effective immediately. He succeeds Thomas Mika, the financial architect who steered the firm through ten years of intensive capitalization, successfully raising more than $800 million.

This executive handover is far more than a routine C-suite shuffle. It signals a fundamental graduation for the firm—from a speculative, capital-hungry research operation into a commercial semiconductor supplier ready to face the unforgiving scrutiny of institutional investors and the immense volume demands of the artificial intelligence boom. With Mika remaining through December 2 to ensure an orderly transition, the board is making a clear statement: the time for proving the science is over; the time for scaling the business has arrived.

The AI Interconnect Bottleneck and the Commercial Imperative

To understand the timing of this leadership change, one must look at the physical limitations currently plaguing hyperscale data centers. As generative AI models grow exponentially in size and complexity, the server clusters training them are hitting severe thermal and bandwidth walls. Traditional copper interconnects are no longer sufficient for the data loads required, and even conventional optical solutions are struggling to balance power consumption with the need for 800G and 1.6T data transmission rates.

This is the exact bottleneck the firm’s patented Optical Interposer platform was designed to solve. By enabling the seamless, wafer-level integration of electronic and photonic devices onto a single chip, the technology promises lower costs, reduced power consumption, and smaller form factors compared to traditional transceivers.

However, having a superior architecture on paper—or even in limited sampling—is vastly different from delivering millions of units to hyperscalers like Microsoft, Google, or Amazon. The competitive landscape is brutal, populated by titans like Broadcom and Marvell, alongside well-funded innovators such as Ayar Labs, all racing to dominate the co-packaged optics (CPO) and advanced interconnect markets.

Competing in this arena requires flawless supply chain execution, rigorous margin control, and the ability to finance massive manufacturing ramps across facilities in Asia. It requires, in short, the exact operational discipline that a veteran of global chipmakers brings to the table.

A Changing of the Guard: From Fundraising to Execution

Thomas Mika’s tenure was characterized by the grueling work of keeping a pre-revenue technology company solvent. Securing over $800 million in capital over a decade is a monumental feat of financial engineering, one that successfully bridged the gap between theoretical physics and a commercially viable product line.

"Over the past decade, Tom has worked closely with me to transform POET from a small company operating on a lean budget into a well-funded commercial enterprise," said Dr. Suresh Venkatesan, the company's Chairman and CEO, in the official announcement. "His leadership and accomplishments have helped position us for the next phase of growth."

But the skills required to fund a vision are rarely the same skills required to optimize a global supply chain or integrate a major acquisition. Enter Giovanni Pacelli. With three decades of financial leadership at both public and private enterprises, Pacelli’s resume reads like a blueprint for semiconductor scaling.

Most recently serving as Senior Director of Finance at Silicon Labs for over eight years, Pacelli cut his teeth in the high-stakes environments of Freescale Semiconductor and NXP. During his time there, he supported the massive finance workstreams required for the historic Freescale-NXP merger—experience that could prove invaluable if the optical interconnect market undergoes the rapid consolidation that many industry analysts are currently predicting.

Pacelli’s mandate is clear: implement the operating discipline necessary for volume production. This means tightening capital allocation, optimizing unit economics, and ensuring the company’s manufacturing partners in Singapore, Malaysia, and China can meet the stringent quality and volume demands of tier-one AI infrastructure buyers.

Wooing Wall Street: The New Era of Transparency

Perhaps the most immediate business implication of Pacelli’s appointment lies in how the firm will interact with the capital markets. For years, the company has operated somewhat on the periphery of mainstream institutional semiconductor coverage. With the transition to commercialization, that dynamic must change, and Pacelli has been explicitly hired to manage this evolution.

At Silicon Labs, Pacelli was a central figure in investor relations. He led the planning for the company’s Analyst Day events, actively managed and expanded sell-side coverage, and served as the face of the company at major institutional gatherings like the Wells Fargo TMT Summit and the UBS Global Technology and AI Conference.

The firm is already signaling a dramatic shift in its communications strategy to match Pacelli’s pedigree. Beginning with its fourth-quarter and full-year 2026 results, the company will initiate regular quarterly earnings conference calls—a standard practice for mature public companies, but a significant milestone for a firm transitioning out of its development phase.

"I am excited to join POET at this important stage," Pacelli noted in the release. "The POET Optical Interposer platform addresses some of the most pressing bandwidth and power challenges in AI infrastructure. My focus will be on disciplined financial execution and clear, consistent communication with our shareholders as we scale."

By opening the floor to quarterly analyst Q&A sessions, the executive team is inviting a new level of accountability. Institutional investors will demand granular updates on customer qualifications, production yields, and gross margin trajectories. Pacelli’s deep relationships within the semiconductor analyst community will be critical in translating the firm's highly technical milestones into the financial metrics that drive stock re-ratings.

To align his interests with this long-term value creation, Pacelli was awarded 384,615 restricted share units (RSUs) under the 2025 Omnibus Incentive Plan, vesting over three years. It is a compensation structure that firmly tethers his financial success to his ability to successfully navigate the company through its most perilous, yet potentially lucrative, growth phase.

Navigating the Hyperscale Battlefield

The immediate road ahead will be a trial by fire. The company is scheduled to report its third-quarter 2026 financial results on Monday, November 16. While Pacelli will have only been in the seat for two weeks, the market will be listening closely for any shifts in tone regarding capital deployment and commercial timelines.

The broader transition from a research-driven culture to an operations-driven one is historically fraught with peril. Engineers must learn to compromise for manufacturability; sales teams must pivot from selling a vision to delivering on strict service-level agreements; and finance departments must transition from managing burn rates to optimizing gross margins.

For leaders watching this transformation, the POET case study offers a potent reminder of the lifecycle of innovation. The executives who build the foundation are rarely the ones who build the skyscraper. By recognizing the specific operational and capital markets expertise required for this next phase—and aggressively recruiting a veteran operator to fill that gap—the board has taken a necessary, albeit challenging, step toward realizing the commercial promise of its optical technology.

As AI data centers continue to consume unprecedented amounts of power and bandwidth, the market for efficient optical interconnects will only expand. The technology has been proven in the lab and funded by a decade of relentless capital raising. Now, with a new financial architect at the helm, the real work of building a profitable semiconductor powerhouse begins.