ASPEED and Lattice Forge New Path for Datacenter Control with Hybrid Chip

HSINCHU and HILLSBORO, Ore. – May 28, 2026 – In a significant move to reshape the backbone of modern datacenters, Baseboard Management Controller (BMC) leader ASPEED Technology and low-power programmable logic giant Lattice Semiconductor have announced a strategic partnership. The first fruit of this collaboration is the ASPEED AST1840, a new class of Satellite Management Controller (SMC) that integrates a programmable FPGA directly into a server management chip, aiming to solve the growing need for flexibility in an industry grappling with the explosive demands of artificial intelligence.

For years, the management controllers that act as the brains of a server's internal operations have been built on fixed-function silicon. This new partnership challenges that paradigm by creating a hybrid device that combines the established management capabilities of an Arm-based processor with the hardware adaptability of an FPGA. This approach promises to give datacenter architects a powerful new tool to design more resilient, adaptable, and future-proof systems.

A New Paradigm in Server Control

The AST1840 is more than just an incremental update; it represents a fundamental shift in server management architecture. At its core, the device marries an Arm Cortex-M4 processing subsystem with a 25k logic cell Lattice FPGA, creating a single, cohesive System-on-Chip (SoC). This integration allows hardware designers to offload and accelerate tasks, customize I/O, and adapt the controller's functionality long after it has been deployed.

Traditionally, accommodating different server configurations, new peripheral cards, or evolving communication standards required either a complex array of external logic components or a costly and time-consuming redesign of the mainboard. The AST1840’s embedded FPGA acts as a block of programmable hardware that can be reconfigured via software. This enables a single SMC to manage a wide variety of server sleds, storage arrays, and accelerator configurations, drastically simplifying inventory management and extending the platform's lifecycle.

"AST1840 is an important step in delivering flexible management solutions for modern server platforms," said Chris Lin, Chairman and President of ASPEED Technology, in the official announcement. "By integrating programmable capabilities within our platform, we are enabling customers to adapt their designs as requirements evolve."

This integrated approach not only reduces board complexity and the bill of materials but also empowers developers to innovate. By using standard toolchains like the Lattice Diamond software and the open-source Zephyr SDK, engineering teams can create custom control and management functions that differentiate their products without being locked into the fixed feature set of a traditional controller.

Meeting the Insatiable Demands of AI

The timing of this innovation is critical. The rapid proliferation of AI and machine learning workloads is placing unprecedented strain on datacenter infrastructure. AI systems are characterized by their use of diverse, power-hungry accelerators like GPUs and custom ASICs, each with unique power, thermal, and management requirements. A static management controller struggles to keep pace with this heterogeneity and rapid evolution.

The programmable nature of the AST1840 is specifically designed to address these challenges. The embedded FPGA can be configured to handle the complex sideband signaling and extensive telemetry required by different accelerator boards. It can implement custom logic for fine-grained power and thermal control, which is essential for maximizing performance and efficiency in dense AI clusters. As new accelerators or interconnect standards emerge, the controller can be updated in the field to support them, protecting the initial infrastructure investment.

"As datacenter architectures continue to evolve, the need for programmability is increasing as the control plane becomes even more critical," noted Ford Tamer, President and CEO of Lattice Semiconductor. "Our collaboration with ASPEED brings programmable control closer to the BMC platform, enabling customers to build solutions that can be extended and deployed across a broad range of systems."

Building on a Foundation of Trust and Openness

Beyond flexibility, the AST1840 is built to address the equally critical needs of security and interoperability in multi-vendor datacenter environments. The chip's design incorporates strong support for open industry standards, a key factor for hyperscalers and enterprise customers seeking to avoid vendor lock-in.

It features support for the Open Compute Project's (OCP) OBMF-ICP standard protocol, facilitating seamless communication and management in OCP-compliant hardware ecosystems. More significantly, the AST1840 integrates a Caliptra 2.x-based hardware Root of Trust (RoT). This provides a cryptographically secure foundation for the entire system, enabling secure boot processes, firmware attestation, and protection against sophisticated tampering and firmware-level attacks. In an age where security breaches are a constant threat, establishing trust at the silicon level is no longer a luxury but a fundamental requirement.

By aligning with both OCP and the Caliptra standard, the partnership signals a commitment to the open, secure, and interoperable principles that are increasingly guiding the development of next-generation datacenter infrastructure. This allows system designers to not only build flexible platforms but also to ensure they are secure and compliant with emerging industry best practices.

A Strategic Alliance to Redefine the Market

The partnership between ASPEED and Lattice is a powerful strategic alignment. ASPEED has long dominated the BMC market, with its chips found in the majority of servers worldwide. Lattice has carved out a leadership position in low-power, small-form-factor FPGAs, which are ideal for control plane applications. Together, they are creating a new product category that leverages the core strengths of both companies.

This collaboration enables a more modular approach to system design, where the core management functions remain robust and standardized while the programmable logic provides a sandbox for customization and future expansion. This hybrid model could set a new precedent for the industry, pressuring competitors to develop similar integrated solutions.

For customers, the AST1840, which is expected to be available for sampling in the third quarter of 2026, offers a compelling path forward. It promises to reduce design complexity, accelerate time-to-market, and provide a degree of future-proofing that is difficult to achieve with current-generation components. As the first product from this collaboration, it also serves as a clear indication of the future roadmap, with both companies planning to explore further opportunities to integrate programmable control across a wider range of platforms.