Navitas Launches 5th-Gen SiC TAP Tech for AI Data Centers and Grid Infrastructure
Event summary
- Navitas Semiconductor unveiled its 5th-generation GeneSiC Trench-Assisted Planar (TAP) MOSFET technology on February 12, 2026.
- The new platform delivers a 35% improvement in RDS,ON × QGD figure of merit (FoM) over previous generations.
- Key reliability benchmarks include extended stress testing, dynamic switching reliability, and enhanced cosmic ray resilience.
- The technology is targeted at AI data centers, grid and energy infrastructure, and industrial electrification.
The big picture
Navitas' 5th-generation SiC TAP technology represents a significant leap in power conversion efficiency and reliability, positioning the company to capture market share in high-growth sectors like AI data centers and energy infrastructure. The launch underscores the strategic shift towards high-voltage applications, where Navitas aims to outperform established competitors with its proprietary trench-assisted planar architecture. The technology's focus on extended stress testing and dynamic switching reliability highlights the critical need for robust solutions in mission-critical environments.
What we're watching
- Performance Gains
- How the 35% improvement in RDS,ON × QGD FoM will impact switching losses and operational efficiency in high-voltage applications.
- Market Adoption
- Whether the enhanced reliability features will accelerate adoption in AI data centers and grid infrastructure.
- Competitive Dynamics
- The pace at which competitors will respond with comparable SiC technology advancements.
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