JEDEC Solid State Technology Association

JEDEC Solid State Technology Association is a global leader in developing open standards for the microelectronics industry. Headquartered in Arlington, Virginia, its mission is to serve the solid-state industry by creating, publishing, and promoting global acceptance of standards, while also providing a forum for technical exchange on leading industry topics. [1, 5, 8, 13, 17, 19]

The association's key activities involve the standardization of various microelectronic components and technologies. This includes memory devices such as DDR SDRAM, LPDDR, and DDR5, as well as interfaces, component packaging, test methods, quality and reliability, thermal standardization, electronic sensitivity, electrical interfaces, and wide bandgap technologies. JEDEC publishes numerous standards, publications, and registration outlines annually, facilitating universal compatibility and reducing development costs across the semiconductor industry. [1, 5, 13, 14, 15, 20]

In recent news, JEDEC announced significant advancements in April 2026, including milestones for the DDR5 multiplexed rank data buffer (MDB) standard and progress on the multiplexed rank registering clock driver (MRCD) standard. The organization is also actively developing the DDR5 MRDIMM Gen2 roadmap to enable higher-bandwidth memory designs. Furthermore, JEDEC previewed its LPDDR6 roadmap, which includes new features and an LPDDR6-based SOCAMM2 specification, specifically addressing the growing demands of AI memory. The association regularly hosts forums focused on next-generation memory for AI, server, cloud, and mobile computing. [2, 4, 5, 6, 9]